 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| DS12887A Real-Time Clock www.maxim-ic.com FEATURES Drop-in replacement for IBM AT computer clock/calendar Pin compatible with the MC146818B and DS1287A Totally nonvolatile with over 10 years of operation in the absence of power Self-contained subsystem includes lithium, quartz, and support circuitry Counts seconds, minutes, hours, days, day of the week, date, month, and year with leapyear compensation valid up to 2100 Binary or BCD representation of time, calendar, and alarm 12- or 24-hour clock with AM and PM in 12hour mode Daylight Savings Time option Selectable between Motorola and Intel bus timing Multiplex bus for pin efficiency Interfaced with software as 128 RAM locations - 14 bytes of clock and control registers - 114 bytes of general-purpose RAM Programmable square-wave output signal Bus-compatible interrupt signals ( IRQ ) Three interrupts are separately softwaremaskable and testable - Time-of-day alarm once/second to once/day - Periodic rates from 122ms to 500ms - End-of-clock update cycle PIN ASSIGNMENT MOT NC NC AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC SQW NC RCLR NC IRQ RESET DS NC R/W AS CS DS12887A 24-Pin Encapsulated Package PIN DESCRIPTION AD0-AD7 - Multiplexed Address/Data Bus NC - No Connection MOT - Bus Type Selection CS - Chip Select AS - Address Strobe R/ W - Read/Write Input DS - Data Strobe RESET - Reset Input IRQ - Interrupt Request Output SQW - Square-Wave Output - +5V Supply VCC RCLR - RAM Clear GND - Ground DESCRIPTION The DS12887A real-time clock plus RAM is designed to be a direct replacement for the DS1287A. The DS12887A is identical in form, fit, and function to the DS1287A, and includes additional 64 bytes of general-purpose RAM. Access to this additional RAM space is determined by the logic level presented on AD6 during the address portion of an access cycle. The RCLR pin is used to clear (set to logic 1) all 114 bytes of general purpose RAM but does not affect the RAM associated with the real-time clock. In order to clear the RAM, RCLR must be forced to an input logic 0 (-0.3V to +0.8V) during battery-backup mode 1 of 2 111901 DS12887A when VCC is not applied. The RCLR function is designed to be used via human interface (shorting to ground manually or by switch) and not to be driven with external buffers. For a complete description of operating conditions, electrical characteristics, bus timing and pin descriptions other than RCLR , see the DS12887 data sheet. DS12887A REAL-TIME CLOCK PLUS RAM PKG DIM A IN. MM B IN. MM C IN. MM D IN. MM E IN. MM F IN. MM G IN. MM H IN. MM J IN. MM K IN. MM 24-PIN MIN MAX 1.320 1.335 33.53 33.91 0.675 0.700 17.15 17.78 0.345 0.370 8.76 9.40 0.100 0.130 2.54 3.30 0.015 0.030 0.38 0.76 0.110 0.140 2.79 3.56 0.090 0.110 2.29 2.79 0.590 0.630 14.99 16.00 0.008 0.012 0.20 0.30 0.015 0.021 0.38 0.53 Note: Pins 2, 3, 16, 20, and 22 are missing by design. This device cannot be stored or shipped in conductive material that will give a continuity path between the RAM clear pin and ground. 2 of 2 |
Price & Availability of DS12887ANBSP
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |